VHDL Code for 4-Bit Shift Register. February 7, 2018 May 1, 2014 by shahul akthar. Table of Contents. The following circuit is a four-bit Serial in – parallel out shift register constructed by D flip-flops. Introducing EDGE Spartan 6 FPGA Development Board! BCD to 7 Segment Decoder VHDL Code. UART Receiver. Purpose: The purpose of this laboratory is to design a Universal Asynchronous Receiver (a UART with out the 'T').This receiver will be used to receive ASCII characters from the PC workstation and display them in HEX on your board. You will use this receiver throughout the semester.
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Asynchronous serial transmitter unit for the Icestick board, synthetized with Opensource Icestorm tools
Serial packages consist of three parts: the start bit, the 8-bit data and the stop bit
Example of the serial transmission of the K character (ASCII 0x4B: Binary: 01001011)
The serial transmitter is encapsulated in the uart-tx entity
Ports
The transmitter unit has 4 inputs and 2 outputs:
Chronogram
The step for transmitting a character are the following:
After that, the unit clears the ready signal and start transmitting the character
Block diagram
The implementation of the transmitter is shown in the given block diagram
It consist of the following parts:
Controller
The transmitter controller is a finite state machine with three states:
This is a generic code for using the UART-tx in your designs in verilog. Of course, some details can change depending on the particular implementation (as for example the definitions of the wires)
Two examples in verilog on how to use the UART-tx unit are shown
txchar.v: Transmitting one character continuously
This is a hello world example. The UART-tx unit is instantiated and configured at 115200 baudrate. The character 'A' is wired to the data port and the signal start is set to 1, so that it will send the character 'A' continuously. The signal ready is NOT used (therefore it is not declared in the instantiation)
For simulating, execute the command:
The simulation in gtkwave is shown:
In total 3 characters 'A' are sent in simulation (there are 30 pulses in the clk_baud signal). The A character is 0x41 in hexadecimal and 01000001 in binary. The serial package is ten bits: the start bit (0) in the right and the stop bit (1) in the left. In binary it is: 1010000010It is transmitted in the reverse orden (first the less significant bit), so the bits that can be seen in the simulation are: 0100000101, repeated three times
For synthesizing the example, execute the following command:
The resources used by the example are:
For uploading into the ICEstick execute:
For testing, launch the gtkterm application (or any other serial terminal program) and deactivate the DTR signal by pressing F7 (or the option control signals / toggle DTR from the menu bar). The Icestick starts to send the A character, filling the terminal completely.
tx-str.v: Transmitting a string
Example on how to transmit a string using the uart-tx unit. The reset is controlled by means of the DTR signal. Every time the circuit is reset, it sends the 'Hello!..' string and finish. A finite state machine is used to send the string
For simulating, execute the command:
The simulation in gtkwave is shown:
It can be seen that there are 8 pulses in the start signal (one per character sent). After the last character is sent (char_counter equal to 7) the fsm enters the last state (3) and finish
For synthesizing the example, execute the following command:
The resources used by the example are:
For uploading into the ICEstick execute:
For testing, launch the gtkterm application (or any other serial terminal program) and deactivate the DTR signal by pressing F7 (or the option control signals / toggle DTR from the menu bar). The Icestick will send the string 'Hello!..'
The file baudgen.vh which contains the divisors for generating the standad baudrates, has been created using the baudgen.py python 3 script. Edit this file and change the clock frequency to adapt it to your own system clock
This is how it is used:
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The python script is:
Juan González Gómez (Obijuan)
Licensed under a GPL v3 (code) and a Creative Commons Attribution-ShareAlike 4.0 International License (figures and images)
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